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IRF9520
Data Sheet July 1999 File Number
2281.3
6A, 100V, 0.600 Ohm, P-Channel Power MOSFET
This advanced power MOSFET is designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. These are P-Channel enhancement mode silicon gate power field effect transistors designed for applications such as switching regulators, switching converters, motor drivers, relay drivers and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17501.
Features
* 6A, 100V * rDS(ON) = 0.600 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance
Symbol
D
Ordering Information
PART NUMBER IRF9520 PACKAGE TO-220AB BRAND IRF9520
G
NOTE: When ordering, use the entire part number.
S
Packaging
JEDEC TO-220AB
SOURCE DRAIN GATE DRAIN (FLANGE)
4-3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
IRF9520
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified IRF9520 -100 -100 -6 -4 -24 20 40 0.32 370 -55 to 150 300 260 UNITS V V A A A V W W/oC mJ oC
oC oC
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC =100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to TJ = 125oC.
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = -250A, VGS = 0V (Figure 10) VGS = VDS, ID = -250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V TC = 125oC MIN -100 -2 -6 0.9 VGS = -10V, ID = -6A, VDS = 0.8 x Rated BVDSS (Figure 14) Gate Charge is Essentially Independent of Operating Temperature VDS = -25V, VGS = 0V, f = 1MHz (Figure 11) Measured From the Modified MOSFET Contact Screw on Tab To Symbol Showing the Center of Die Internal Devices Measured From the Drain Inductances Lead, 6mm (0.25in) from Package to Center of Die
D LD
TYP 0.500 2 25 50 50 50 16 9 7 300 200 50 3.5
MAX -4 -25 -250 100 0.600 50 100 100 100 22 -
UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance
ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD
VDS > ID(ON) x rDS(ON) MAX, VGS = -10V VGS = 20V ID = -3.5A, VGS = -10V (Figures 8, 9) VDS > ID(ON) x rDS(ON)MAX, ID = -3.5A ( Figure 12) VDD = 0.5 x Rated BVDSS, ID -6.0A, RG = 50 , RL = 7.7 for VDSS = 50 MOSFET Switching Times are Essentially Independent of Operating Temperature
-
-
4.5
-
nH
Internal Source Inductance
LS
Measured From the Source Lead, 6mm (0.25in) From Header to Source Bonding Pad
G LS S
7.5
-
nH
Thermal Resistance Junction-to-Case Thermal Resistance Junction-to-Ambient
RJC RJA Typical Socket Mount
-
-
3.12 62.5
oC/W oC/W
4-4
IRF9520
Source to Drain Diode Specifications
PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode
G D
MIN -
TYP -
MAX -6.0 -24
UNITS A A
S
Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES:
VSD trr QRR
TC = 25oC, ISD = -6.0A, VGS = 0V (Figure 13) TJ = 150oC, ISD = -6.0A, dISD/dt = 100A/s TJ = 150oC, ISD = -6.0A, dISD/dt = 100A/s
-
230 1.3
-1.5 -
V ns C
2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 15.4mH, RG = 25, peak IAS = 6.0A.
Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8
Unless Otherwise Specified
6.0
ID, DRAIN CURRENT (A)
4.8
3.6
0.6 0.4
2.4
0.2 0.0 0 25 50 75 100 TA , CASE TEMPERATURE (oC) 125 150
1.2
0 25 50 75 100 125 150 TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
ZJC, NORMALIZED TRANSIENT THERMAL IMPEDANCE
1 0.5 PDM
0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 10-5
t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC 10-3 10-2 10-1 1 10
10-4
t 1, RECTANGULAR PULSE DURATION (s)
FIGURE 3. NORMALIZED TRANSIENT THERMAL IMPEDANCE
4-5
IRF9520 Typical Performance Curves
Unless Otherwise Specified (Continued)
-10 10s -8 ID, DRAIN CURRENT (A) 10 100s ID, DRAIN CURRENT (A) VGS = -10V VGS = -9V VGS = -8V
1ms OPERATION IN THIS AREA IS LIMITED BY rDS(ON)
-6 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX.
VGS = -7V
1
10ms 100ms DC
-4
VGS = -6V -2
TC = 25oC TJ = MAX RATED 0.1 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 100
VGS = -5V VGS = -4V
0
0
-10 -20 -30 -40 VDS, DRAIN TO SOURCE VOLTAGE (V)
-50
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
-5 VGS = -8V VGS = -9V -3 VGS = -10V VGS = -6V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX. VGS = -5V -1 VGS = -4V 0 0 -4 -2 -3 -1 VDS, DRAIN TO SOURCE VOLTAGE (V) -5 VGS = -7V ID(ON), ON-STATE DRAIN CURRENT (A)
-10
ID, DRAIN CURRENT (A)
-4
VDS I D(ON) x rDS(ON) MAX PULSE DURATION = 80s -8 DUTY CYCLE = 0.5% MAX. TJ = 125oC -6 TJ = 25oC TJ = -55oC
-2
-4
-2
0 0 -2 -4 -6 -8 VGS, GATE TO SOURCE VOLTAGE (V) -10
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
2.0 NORMALIZED DRAIN TO SOURCE ON RESISTANCE PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX. rDS(ON), DRAIN TO SOURCE ON RESISTANCE () 1.6
2.2 VGS = -10V, ID = -4A PULSE DURATION = 80s 1.8 DUTY CYCLE = 0.5% MAX.
1.2 VGS = -10V 0.8
1.4
1.0
0.4
VGS = -20V
0.6
0
0.2 0 -5 -10 -15 ID, DRAIN CURRENT (A) -20 -25
-40
0
40
80
120
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
4-6
IRF9520 Typical Performance Curves
1.25 ID = 250A NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.15 C, CAPACITANCE (pF) 400 CISS 300 COSS
Unless Otherwise Specified (Continued)
500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD
1.05
0.95
200
0.85
100
CRSS
0.75 -40
0
40
80
120
160
0
0
-10
-20
-30
-40
-50
TJ , JUNCTION TEMPERATURE (oC)
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
3 gfs, TRANSCONDUCTANCE (S) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX. ISD, DRAIN CURRENT (A)
-100
2 TJ = -55oC TJ = 25oC 1 TJ = 125oC
-10
TJ = 150oC
-1.0
TJ = 25oC
0
0
-2
-4 -6 ID , DRAIN CURRENT (A)
-8
-10
-0.1 -0.4
-0.6
-0.8
-1.0
-1.2
-1.4
-1.6
-1.8
VSD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
0 ID = -6A VGS, GATE TO SOURCE (V)
-5
VDS = -80V
-10
VDS = -50V VDS = -20V
0
4
8
12
16
20
Qg(TOT) , TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
4-7
IRF9520 Test Circuits and Waveforms
VDS tAV L VARY tP TO OBTAIN REQUIRED PEAK IAS RG 0
+
VDD VDD
0V VGS
DUT tP IAS 0.01
IAS tP BVDSS VDS
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr RL 0 10%
tOFF td(OFF) tf 10%
DUT VGS RG
VDD
+
VDS VGS 0
90%
90%
10% 50% PULSE WIDTH 90% 50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
-VDS (ISOLATED SUPPLY) 0 DUT 12V BATTERY 0.2F 50k 0.3F
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
VDS
Qgs D G 0 IG(REF) IG CURRENT SAMPLING RESISTOR S +VDS ID CURRENT SAMPLING RESISTOR 0 DUT VDD Qgd Qg(TOT)
VGS
IG(REF)
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
4-8
IRF9520
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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